Walk-in Venue: Quality Inn Centurion Hotel: Shivaji Nagar, Opp. Akashwani, Pune - 411005, Tel.: 020-25510600.
Infotech office Contact details :Ph: +91-040-23007455 or 23007462. Mobile: 9246372722
Walk-in Time: 10.00 AM to 3.00 PM.
Please refer your friends, relatives and acquaintances for these opportunities. The Job Descriptions for these positions are mentioned below.
Structural Analysis Engineers: ( Ansys / Nastran / Patran / Hypermesh) (Job Code: SAE)
engineering components is preferred. Experience in interpreting and understanding FEA results, post-processing, suggesting alternative design solutions and preparing comprehensive analysis reports are expected. Experience in ANSYS work bench, ANSYS APDL, TCL and TK experience to write macros in HM, assembly modelling or 3D Meshing using brick elements would be added adva 2 - 8 years' experience in finite element modelling, analysis and post processing. Candidates should have hands-on experience with various analysis types such as linear statics, non-linear statics (contact, material and large deformation), dynamics (normal modes and cyclic modal) etc. Expertise in 2D/3D FE modeling in Ansys or NX- CAE or Hypermesh or Patran/Nastran or LS Dyna or Abaqus, for aero-engine/turbo-machinery/automotive/heavyntage.
Job Location: Hyderabad
Component Design Engineers (Job Code: CPDE)
3 - 7 years of experience in component design of Aircraft engine or Automotive components. Sound understanding of mechanical design principles, exposure to root cause analyses of field problems and experience in working in multi-discipline teams are pre-requisites. Knowledge of ASME standards and GD&T practices are essential. The candidate is expected to prepare design concepts, parametric models and detailed manufacturing drawings using Catia/UG CAD software.
Job Location: Hyderabad
ASIC VERIFICATION (Job Code: ASIC-V)
Experience: 2 to 10 years' experience in the following areas:
Multiple skills required:
Expertise in System Verilog & OVM .
Expertise in System Verilog & e-specman.
Expertise in Mixed Signal Verification.
Expertise in Low Power Design Verification.
Job Location: Hyderabad & Bangalore
ASIC PHYSICAL DESIGN (Job Code: ASIC- PD)
Experience: 2 to 10 years' experience in the following areas:
Partitioning, IO ring preparation, Floor Planning, PG planning, Place and Route, Clock Tree Synthesis, Timing Closure, Static Timing Analysis, IR drop analysis, Physical verification, Signal Integrity, Low Power design.
Job Location: Hyderabad ,Bangalore, Vizag & Noida.
ASIC IMPLEMENTATION (Job Code: ASIC-IMP)
Experience: 2 to 10 years' experience in the following areas:
Logic Synthesis, Low Power Synthesis, Timing Constraints, Timing Closure, Static Timing Analysis, Cross talk analysis and Repair, Formal Verification.
Job Location: Hyderabad ,Bangalore & Noida.
ASIC DFT (Job Code: ASIC-DFT)
Experience: 2 to 10 years' experience in the following areas:
è Basic logic design, Verilog RTL and verification back ground with exposure to STA utilizing industry standard tools.
è Must possess a strong knowledge of DFT including JTAG, Boundary scan, MBIST, LBIST, scan, on-chip scan compression, fault models, ATPG, and fault simulation and AC scan for at speed testing.
è Expertise in industry standard EDA tools for DFT such as DFTAdvisor, fastscan/TestKompress, TetraMax, LogicVision.
è Experience in Full-Chip DFT implementation of Scan, EDT/Adaptive Scan, JTAG, MBIST, Transition and Path delay ATPG.
è Experience in Gate Level Simulations, Synthesis, STA and Formal Verification. Understanding of ATE and test engineering. Post-Silicon debug.
è Programming in Perl, tcl, awk and c/c++.
è Experience in DFT with Logic Vision tools is mandatory.
Job Location: Hyderabad ,Bangalore & Vizag .
FPGA Engineers (Job Code: FPGA)
Experience: 2 to 10 years' experience in the following areas
Ability to interface with silicon companies and understand their requirements and expectations.
è Rapidly adapt to different design and verification environments
è Coordinate efforts with offshore design and verification teams
è Strong experience using System Verilog & OVM / VMM
è Experience in Test Benches
è ACTEL based experience would be an added advantage
Job Location: Hyderabad
Qualification for all the above positions: BE/B.Tech or ME/M.Tech/MS in respective streams.
Candidates who are unable to attend the drive can forward their resumes mentioning "Job Code & Years of Experience" in the Subject line to: Praveen.Vemula@infotech-enterprises.com; Kiran.Chettigari@infotech-enterprises.com
Please adv. Candidates to carry relevant documents for the interview: Latest resume, academic qualification documents, Experience certificate, Latest 3 months payslips pay slips, etc.
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